NXP Semiconductors /QN908XC /SPI0 /CFG

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Interpret as CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)ENABLE 0 (SLAVE_MODE)MASTER 0 (STANDARD)LSBF 0 (CHANGE)CPHA 0 (LOW)CPOL 0 (DISABLED)LOOP 0 (LOW)SPOL0 0 (LOW)SPOL1 0 (LOW)SPOL2 0 (LOW)SPOL3

CPHA=CHANGE, SPOL1=LOW, CPOL=LOW, LOOP=DISABLED, SPOL2=LOW, MASTER=SLAVE_MODE, SPOL0=LOW, ENABLE=DISABLED, SPOL3=LOW, LSBF=STANDARD

Description

SPI Configuration register

Fields

ENABLE

SPI enable.

0 (DISABLED): Disabled. The SPI is disabled and the internal state machine and counters are reset.

1 (ENABLED): Enabled. The SPI is enabled for operation.

MASTER

Master mode select.

0 (SLAVE_MODE): Slave mode. The SPI will operate in slave mode. SCK, MOSI, and the SSEL signals are inputs, MISO is an output.

1 (MASTER_MODE): Master mode. The SPI will operate in master mode. SCK, MOSI, and the SSEL signals are outputs, MISO is an input.

LSBF

LSB First mode enable.

0 (STANDARD): Standard. Data is transmitted and received in standard MSB first order.

1 (REVERSE): Reverse. Data is transmitted and received in reverse order (LSB first).

CPHA

Clock Phase select.

0 (CHANGE): Change. The SPI captures serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is changed on the following edge.

1 (CAPTURE): Capture. The SPI changes serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is captured on the following edge.

CPOL

Clock Polarity select.

0 (LOW): Low. The rest state of the clock (between transfers) is low.

1 (HIGH): High. The rest state of the clock (between transfers) is high.

LOOP

Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing.

0 (DISABLED): Disabled.

1 (ENABLED): Enabled.

SPOL0

SSEL0 Polarity select.

0 (LOW): Low. The SSEL0 pin is active low.

1 (HIGH): High. The SSEL0 pin is active high.

SPOL1

SSEL1 Polarity select.

0 (LOW): Low. The SSEL1 pin is active low.

1 (HIGH): High. The SSEL1 pin is active high.

SPOL2

SSEL2 Polarity select.

0 (LOW): Low. The SSEL2 pin is active low.

1 (HIGH): High. The SSEL2 pin is active high.

SPOL3

SSEL3 Polarity select.

0 (LOW): Low. The SSEL3 pin is active low.

1 (HIGH): High. The SSEL3 pin is active high.

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